MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND SLEW RATE CALIBRATION METHOD THEREOF

A memory device includes a main driver and a pre-driver. The main driver provides an output signal to a host based on a plurality of driving signals. The pre-driver provides the main driver with the plurality of driving signals in order to calibrate a slew rate of the output signal based on an output resistance value of the main driver and a resistance value of an on-die termination circuit of the host. The pre-driver is configured to generate a first driving signal of the plurality of driving signals in response to an input signal regardless of a control signal, and to generate a second driving signal of the plurality of driving signals in response to the input signal and the control signal.