SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT

A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconduct...

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Hauptverfasser: Lin, Xin, Zuo, Jiang-Kai, Yang, Hongning, Zhu, Ronghua
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creator Lin, Xin
Zuo, Jiang-Kai
Yang, Hongning
Zhu, Ronghua
description A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconductor substrate and to which a voltage is applied during operation, and a plurality of reduced surface field (RESURF) layers disposed in the semiconductor substrate, the plurality of reduced surface field (RESURF) layers being arranged in a stack between the body region and the isolation contact.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2018130903A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2018130903A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2018130903A13</originalsourceid><addsrcrecordid>eNrjZLAJdvX1dPb3cwl1DvEPUnBxDfN0dlXwDPb3cQzx9PdTCPcM8VAIcg0ODXJT8HGMdA1ScAwKcvRzd_V19QvhYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoYWhsYGlgbGjobGxKkCANkHKtI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT</title><source>esp@cenet</source><creator>Lin, Xin ; Zuo, Jiang-Kai ; Yang, Hongning ; Zhu, Ronghua</creator><creatorcontrib>Lin, Xin ; Zuo, Jiang-Kai ; Yang, Hongning ; Zhu, Ronghua</creatorcontrib><description>A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconductor substrate and to which a voltage is applied during operation, and a plurality of reduced surface field (RESURF) layers disposed in the semiconductor substrate, the plurality of reduced surface field (RESURF) layers being arranged in a stack between the body region and the isolation contact.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180510&amp;DB=EPODOC&amp;CC=US&amp;NR=2018130903A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180510&amp;DB=EPODOC&amp;CC=US&amp;NR=2018130903A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lin, Xin</creatorcontrib><creatorcontrib>Zuo, Jiang-Kai</creatorcontrib><creatorcontrib>Yang, Hongning</creatorcontrib><creatorcontrib>Zhu, Ronghua</creatorcontrib><title>SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT</title><description>A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconductor substrate and to which a voltage is applied during operation, and a plurality of reduced surface field (RESURF) layers disposed in the semiconductor substrate, the plurality of reduced surface field (RESURF) layers being arranged in a stack between the body region and the isolation contact.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAJdvX1dPb3cwl1DvEPUnBxDfN0dlXwDPb3cQzx9PdTCPcM8VAIcg0ODXJT8HGMdA1ScAwKcvRzd_V19QvhYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoYWhsYGlgbGjobGxKkCANkHKtI</recordid><startdate>20180510</startdate><enddate>20180510</enddate><creator>Lin, Xin</creator><creator>Zuo, Jiang-Kai</creator><creator>Yang, Hongning</creator><creator>Zhu, Ronghua</creator><scope>EVB</scope></search><sort><creationdate>20180510</creationdate><title>SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT</title><author>Lin, Xin ; Zuo, Jiang-Kai ; Yang, Hongning ; Zhu, Ronghua</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2018130903A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lin, Xin</creatorcontrib><creatorcontrib>Zuo, Jiang-Kai</creatorcontrib><creatorcontrib>Yang, Hongning</creatorcontrib><creatorcontrib>Zhu, Ronghua</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lin, Xin</au><au>Zuo, Jiang-Kai</au><au>Yang, Hongning</au><au>Zhu, Ronghua</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT</title><date>2018-05-10</date><risdate>2018</risdate><abstract>A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconductor substrate and to which a voltage is applied during operation, and a plurality of reduced surface field (RESURF) layers disposed in the semiconductor substrate, the plurality of reduced surface field (RESURF) layers being arranged in a stack between the body region and the isolation contact.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T13%3A55%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Lin,%20Xin&rft.date=2018-05-10&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2018130903A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true