MEMORY DEVICES AND METHODS FOR OPERATING THE SAME

A memory device includes a memory including memory cells, each of the memory cells being configured to store multiple bits of data. The memory device includes a controller configured to map the levels of the memory cells to bits such that a first half of the levels have a bit with a first binary value in a desired bit position and a second half of the levels have a bit with a second binary value in the desired bit position. The first half of the levels are a first group of consecutive levels, and the second half of the levels are a second group of consecutive levels. The controller is configured to generate a distribution for writing the data to the memory cells based on the mapping, and write the data to the memory cells based on the determined distribution.