REDUCING MEMORY ACCESS LATENCY IN SCATTER/GATHER OPERATIONS

Various embodiments execute a program with improved cache efficiency. In one embodiment, a first subset of operations of a program is performed on a plurality of objects stored in one or more data structures. The first subset of operations has a regular memory access pattern. After each operation in the first subset of operations has been performed, results of the operation are stored in one of the plurality of queues. Each queue in the plurality of queues is associated with a different cacheable region of a memory. A second subset of operations in the program is performed utilizing at least one queue in the plurality of queues. The second subset of operations utilizes results of the operations in the first subset of operations stored in the queue. The second subset of operations has an irregular memory access pattern that is regularized by localizing memory locations accessed by the second subset of operations to the cacheable region of memory associated with the at least one queue. Results of each operation performed in the second subset of operations are stored in memory.