System and Method for a High-Ohmic Resistor

According to an embodiment, a circuit includes a high-Ω resistor including a plurality of semiconductor junction devices coupled in series and a plurality of additional capacitances formed in parallel with the plurality of semiconductor junction devices. Each semiconductor junction device of the plu...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Valli Luca, Gaggl Richard, Muehlbacher Benno
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:According to an embodiment, a circuit includes a high-Ω resistor including a plurality of semiconductor junction devices coupled in series and a plurality of additional capacitances formed in parallel with the plurality of semiconductor junction devices. Each semiconductor junction device of the plurality of semiconductor junction devices includes a parasitic doped well capacitance configured to insert a parasitic zero in a noise transfer function of the high-Ω resistor. Each additional capacitance of the plurality of additional capacitances is configured to adjust a parasitic pole in the noise transfer function of the high-Ω resistor in order to compensate for the parasitic zero.