REGULATOR CIRCUIT WITH ENHANCED RIPPLE REDUCTION SPEED

A regulator circuit includes an OP-amp, buffer, power transistor, voltage divider, load, and feedback current generator. The OP-amp generates first voltage signal by amplifying a difference between an input voltage signal and a feedback voltage signal. The OP-amp drives a first node as the first voltage signal. The buffer drives a second node as a second voltage signal generated based on the first voltage signal. The power transistor includes a drain terminal receiving a supply voltage, a gate terminal connected to the second node, and a source terminal connected to a third node. The voltage divider generates the feedback voltage signal by dividing an output voltage signal of the third node. The load includes a terminal connected to the third node and another terminal receiving a ground voltage. The feedback current generator provides a first feedback current corresponding to a ripple of the output voltage signal to the first node for enhancing a speed at which the ripple reduced.