LOW DROPOUT REGULATOR WITH PMOS POWER TRANSISTOR

A low dropout regulator includes a PMOS power transistor, a feedback network, an error amplifier and an active enhanced PSRR unit. The PMOS power transistor has a first end coupled to an input voltage, and a second end coupled to a load and the feedback network. The error amplifier receives a feedback signal generated from the feedback network, compares the feedback signal with a reference voltage to generate a difference value, and amplifies the difference value to generate an error signal. The active enhanced PSRR unit has one end coupled to the first end, and another end coupled to a control end of the PMOS power transistor and the error amplifier, detects an input voltage of the first end, and correspondingly adjusts a voltage of the control end to stabilize a voltage between the control end and the first end according to a variation of the input voltage.