INFORMATION PROCESSING APPARATUS

According to one embodiment, an information processing apparatus includes a host device, a memory system and a power supply circuit. The host device includes a volatile first memory and a first control circuit. The memory system includes a non-volatile second memory in which user data is stored and...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: FUNAOKA Kenji, NISHINO Reina, KONDO Nobuhiro, MAEDA Kenichi, FUJISAWA Toshio
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:According to one embodiment, an information processing apparatus includes a host device, a memory system and a power supply circuit. The host device includes a volatile first memory and a first control circuit. The memory system includes a non-volatile second memory in which user data is stored and a second control circuit. The second control circuit executes transfer of the user data between the host device and the second memory. The first memory includes an area used by the second control circuit. The second control circuit uses the area as a buffer for the transfer. The first control circuit causes the power supply circuit to start and stop the power supply to the memory system. The first control circuit accesses, while the power supply to the memory system is stopped, the buffer.