STACKED SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

A method may include providing a first semiconductor chip and a first insulating layer surrounding lateral sides of the first semiconductor chip; providing a second semiconductor chip and a second insulating layer surrounding lateral sides of the second semiconductor chip; providing a third insulating layer below the first semiconductor chip and first insulating layer, so that the first semiconductor chip is between the third insulating layer and the second semiconductor chip, the third insulating layer forming a package substrate; providing a plurality of external connection terminals on the third insulating layer, such that the third insulating layer has a first surface facing the first semiconductor chip and a second surface facing the external connection terminals; providing a first redistribution line on the first surface of the third insulating layer and extending horizontally along the first surface of the third insulating layer, the first redistribution line contacting a first conductive pad of the first semiconductor chip; and providing a second redistribution line connected to a second conductive pad at a surface of the second semiconductor chip, the second redistribution line passing through the first insulating layer to contact the first redistribution line.