CIRCUIT DESIGN SUPPORT METHOD, CIRCUIT DESIGN SUPPORT APPARATUS, AND RECORDING MEDIUM

A circuit design support apparatus acquires an encoding matrix and information indicative of a start timing. For each timing after the start timing indicated by the acquired information, among the timings corresponding to column vectors of the encoding matrix, the circuit design support apparatus identifies among first partial data stored in BRAMs, a first partial data overwritten by a second partial data at the timing. For each of the timings after the start timing, the circuit design support apparatus identifies an XOR operation based on the identified first partial data among multiple XOR operations. For each of the timings after the start timing, the circuit design support apparatus identifies among timings before the start timing included in the timings, a timing having the same operation result of the identified XOR operation as the operation result of the identified XOR operation based on the vector corresponding to the timing.