VERTICALLY INTEGRATED MEMORY CELL

VERTICALLY INTEGRATED MEMORY CELL

A method of forming a vertically integrated memory cell including a deep trench extending into a substrate, a trench capacitor located within the deep trench, and a vertical transistor at least partially embedded within the deep trench above the trench capacitor, the vertical transistor is in direct...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Barth, JR. John E, Khan Babar A
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A method of forming a vertically integrated memory cell including a deep trench extending into a substrate, a trench capacitor located within the deep trench, and a vertical transistor at least partially embedded within the deep trench above the trench capacitor, the vertical transistor is in direct contact with and electrically coupled to the trench capacitor.