Display Driver Circuitry With Gate Line and Data Line Delay Compensation

Gate driver circuitry in a display may supply gate line signals to rows of pixels on gate lines. Data line driver circuitry may supply data line signals to columns of pixels on data lines. The gate driver circuitry may have registers that are coupled to form a shift register that supplies the gate line signals to the gate lines. To compensate for data line signal propagation delays, the registers of the shift register may be clocked with increasingly delayed clocks as a function of increasing distance away from the display driver circuitry. To compensate for gate line signal propagation delays, the data line driver circuitry may impose increasing delays on the data line signals carried on the data lines as a function of increasing distance of the data lines away from the gate driver circuitry.