DEBUGGING SCAN LATCH CIRCUITS USING FLIP DEVICES

DEBUGGING SCAN LATCH CIRCUITS USING FLIP DEVICES

A latch circuit having a master latch and a slave latch includes a device used to short either the master latch or the slave latch. The device includes a transistor and a global control used to assert a signal, and is positioned to short an inverter of the master latch or the slave latch. When the s...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: Warnock James D
Format: Patent
Sprache:eng
Schlagworte:
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Beschreibung
Zusammenfassung:A latch circuit having a master latch and a slave latch includes a device used to short either the master latch or the slave latch. The device includes a transistor and a global control used to assert a signal, and is positioned to short an inverter of the master latch or the slave latch. When the signal is asserted by the global control, the inverter is shorted such that the output value of the inverter is the same as the input value. The assertion of the signal is facilitated by another device connected to the master latch and the slave latch that includes the global control and a transistor.