PROGRAMMING HARDWARE REGISTERS USING A PIPELINED REGISTER BUS, AND RELATED METHODS, SYSTEMS, AND APPARATUSES
Programming hardware registers using a pipelined register bus, and related methods, systems, and apparatuses are disclosed. In one aspect, a method for communicating over a register bus comprises initiating, at a register bus master, a request comprising an address, and passing the request from the...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | Programming hardware registers using a pipelined register bus, and related methods, systems, and apparatuses are disclosed. In one aspect, a method for communicating over a register bus comprises initiating, at a register bus master, a request comprising an address, and passing the request from the register bus master to a first register bus slave of a processor module via a register bus. The method further comprises decoding the address at a module core of the processor module, and determining whether the address corresponds to the processor module. The method also comprises, responsive to determining that the address corresponds to the processor module, processing the request by the module core, and passing the same request as-is to a second register bus slave. The method additionally comprises, responsive to determining that the address does not correspond to the processor module, passing the same request as-is to the second register bus slave. |
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