WIRING TOPOLOGY METHOD AND INFORMATION PROCESSING DEVICE

A wiring topology display method, includes: obtaining layout information indicating positions of components and wiring coupling the components; dividing first wiring into first pieces of partial wiring, and generating partial wiring information indicating the first pieces of partial wiring; identify...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SHIIHARA HIDENOBU, IWASAKI TSUNAKI, IWAKURA YOSHIYUKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A wiring topology display method, includes: obtaining layout information indicating positions of components and wiring coupling the components; dividing first wiring into first pieces of partial wiring, and generating partial wiring information indicating the first pieces of partial wiring; identifying a first length of the partial wiring and a first angle of the partial wiring for a vector; identifying combinations of second pieces of partial wiring based on the first length and the first angle, the second pieces of partial wiring having second lengths which are a certain length or more, second angles which are different by a certain angle, and a distance which is a certain distance or less; identifying a group having the combinations including pieces of identical partial wiring; and symbolizing third pieces of partial wiring at both ends of the group and fourth pieces of partial wiring between the third pieces of partial wiring.