PROVIDING MULTIPLE MEMORY MODES FOR A PROCESSOR INCLUDING INTERNAL MEMORY

In one embodiment, a processor comprises: at least one core formed on a die to execute instructions; a first memory controller to interface with an in-package memory; a second memory controller to interface with a platform memory to couple to the processor; and the in-package memory located within a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	SODANI AVINASH, GIRKAR MILIND B, KLEEN ANDREAS, CANTALUPO CHRISTOPHER M, KYANKO ROBERT J, GRECO RICHARD J
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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