PROVIDING MULTIPLE MEMORY MODES FOR A PROCESSOR INCLUDING INTERNAL MEMORY

In one embodiment, a processor comprises: at least one core formed on a die to execute instructions; a first memory controller to interface with an in-package memory; a second memory controller to interface with a platform memory to couple to the processor; and the in-package memory located within a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	SODANI AVINASH, GIRKAR MILIND B, KLEEN ANDREAS, CANTALUPO CHRISTOPHER M, KYANKO ROBERT J, GRECO RICHARD J
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	In one embodiment, a processor comprises: at least one core formed on a die to execute instructions; a first memory controller to interface with an in-package memory; a second memory controller to interface with a platform memory to couple to the processor; and the in-package memory located within a package of the processor, where the in-package memory is to be identified as a more distant memory with respect to the at least one core than the platform memory. Other embodiments are described and claimed.