SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY, CACHE MEMORY, AND COMPUTER SYSTEM

In one embodiment, the memory device includes a data storage region and an error correction (ECC) region. The data storage region configured to store a first number of data blocks. The ECC region is configured to store a second number of ECC blocks. Each of the second number of ECC blocks is configu...

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Bibliographische Detailangaben
Hauptverfasser: KIM SUN-GYEUM, AHN JUN-WHAN, CHOI KI-YOUNG, KWON HYEOK-MAN, KWON YOUNG-JUN
Format: Patent
Sprache:eng
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Zusammenfassung:In one embodiment, the memory device includes a data storage region and an error correction (ECC) region. The data storage region configured to store a first number of data blocks. The ECC region is configured to store a second number of ECC blocks. Each of the second number of ECC blocks is configured to store ECC information. The second number of the ECC blocks is associated with the first number of data blocks, and the second number is less than the first number.