LOW POWER ARCHITECTURES
Systems and methods for tuning a voltage are described herein. In one embodiment, a method comprises sending a data signal to first and second flops via a data path, latching in the data signal at the first flop using a clock signal, and latching the data signal at the second flop using a delayed ve...
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Sprache: | eng |
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Zusammenfassung: | Systems and methods for tuning a voltage are described herein. In one embodiment, a method comprises sending a data signal to first and second flops via a data path, latching in the data signal at the first flop using a clock signal, and latching the data signal at the second flop using a delayed version of the clock signal. The method also comprises detecting a mismatch between outputs of the first and second flops, and adjusting the voltage based on the detected mismatch. |
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