BACK BIASED TRANSISTOR AND CURRENT SOURCE BIASING

A semiconductor chip device may include a silicon on insulator (SOI) base, a first transistor, and a voltage device. The SOI base may include a semiconductor substrate having a first doped layer and a second doped layer directly on the first doped layer, a buried oxide layer directly on the second d...

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Bibliographische Detailangaben
Hauptverfasser: YILMA DEREJE G, PHAN NGHIA V, ROSNO PATRICK L, LUKES ERIC J
Format: Patent
Sprache:eng
Schlagworte:
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Zusammenfassung:A semiconductor chip device may include a silicon on insulator (SOI) base, a first transistor, and a voltage device. The SOI base may include a semiconductor substrate having a first doped layer and a second doped layer directly on the first doped layer, a buried oxide layer directly on the second doped layer, and a first moat electrically isolating a first bias region of the second doped layer. The first bias region may be electrically coupled to a current source. The first transistor may be formed above the buried oxide layer and the first bias region. The first transistor may include a first drain a first source a first body a first gate and a first back gate. The voltage device may be electrically coupled to the first back gate and the first gate and configured to maintain a voltage difference between the first gate and the first back gate.