2.5 GBPS/5GBPS ETHERNET COMMUNICATIONS OVER A FULL DUPLEX COMMUNICATION CHANNEL
Transceiver architecture includes circuitry and a method to transmit and receive high speed WAP data over lower speed cabling such as Cat5e. The method begins by measuring quality of a wired bi-directional communications channel. The method continues by selecting a maximum possible data transmission...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Transceiver architecture includes circuitry and a method to transmit and receive high speed WAP data over lower speed cabling such as Cat5e. The method begins by measuring quality of a wired bi-directional communications channel. The method continues by selecting a maximum possible data transmission rate over the wired bi-directional communications channel for the measured quality level and when the maximum possible data transmission rate is a reduced data transmission rate less than a maximum data transmission rate of the transceivers, proportionally adjusting clock rates of circuit elements of the first and second transceiver to transfer the data at the reduced data transmission rate. The method includes dividing data frames of the data to be transmitted N times, where N=number of layers of at least a portion of identical transceiver processing circuitry which is connected to twisted wiring pairs of the wired bi-directional communications channel. |
---|