WAFER FRONTSIDE-BACKSIDE THROUGH SILICON VIA

WAFER FRONTSIDE-BACKSIDE THROUGH SILICON VIA

A wafer frontside-backside through silicon via and methods of manufacture are disclosed. The method includes forming a plurality of frontside metalized vias into a partial depth of a substrate. The method further includes forming a backside via in the substrate which exposes, from the backside, the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: STAMPER ANTHONY K, VANSLETTE DANIEL S, TOPIC-BEGANOVIC ZELJKA, MALING JEFFREY C
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A wafer frontside-backside through silicon via and methods of manufacture are disclosed. The method includes forming a plurality of frontside metalized vias into a partial depth of a substrate. The method further includes forming a backside via in the substrate which exposes, from the backside, the plurality of frontside metalized vias. The method further includes forming a metal in the via in contact with the plurality of metalized frontside vias.