MEMORY SYSTEM

A memory system according to the present embodiment includes a memory controller including a first data bus and a first address bus. A memory part includes a second data bus and a second address bus. A bridge part is capable of receiving an address from the memory controller via the first data bus,...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KASHIWAGI JIN, EGUCHI YASUYUKI, YAMAZAKI HIDEAKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A memory system according to the present embodiment includes a memory controller including a first data bus and a first address bus. A memory part includes a second data bus and a second address bus. A bridge part is capable of receiving an address from the memory controller via the first data bus, and outputs the address via the first address bus to the memory part.