MEMORY CONTROLLER AND MEMORY SYSTEM

MEMORY CONTROLLER AND MEMORY SYSTEM

According to one embodiment, a memory controller includes a controller that is configured to, when notified of an error by one of memory chips at a time of power supply startup, transmit a first command including an address to the memory chip by which the error was notified, when notified of a norma...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HIDA TOSHIKATSU, HARA TOKUMASA, KOJIMA YOSHIHISA, IWAI HITOSHI, FUJITA SHIROU, SUKEGAWA HIROSHI, TOKIWA NAOYA
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:According to one embodiment, a memory controller includes a controller that is configured to, when notified of an error by one of memory chips at a time of power supply startup, transmit a first command including an address to the memory chip by which the error was notified, when notified of a normal end by the memory chip in which the first command was received, transmit a second command including an address to the memory chip by which the normal end was notified.