EDGE TERMINATION CONFIGURATIONS FOR HIGH VOLTAGE SEMICONDUCTOR POWER DEVICES

This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area wherein the edge termination area comprises a wide trench filled with a field-crowding reduction filler and a buried field plate buried under a top...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: BOBDE MADHUR, LUI SIK K, BHALLA ANUP
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area wherein the edge termination area comprises a wide trench filled with a field-crowding reduction filler and a buried field plate buried under a top surface of the semiconductor substrate and laterally extended over a top portion of the field crowding field to move a peak electric field laterally away from the active cell area. In a specific embodiment, the field-crowding reduction filler comprises a silicon oxide filled in the wide trench.