FULLY DIFFERENTIAL LEVEL CONVERSION CIRCUIT

A fully differential level conversion circuit includes a positive signal branch, a negative signal branch and a coupling branch. The negative signal branch has identical structural features with the positive signal branch, which includes a drive terminal and a load terminal, an external fully differential signal is inputted to the drive terminals of the positive signal branch and the negative signal branch correspondingly. The coupling branch includes a first group of active couplers which forms a dual structure with the drive terminal of the positive signal branch and a second group of active couplers which form another dual structure with the drive terminal of the negative signal branch, both of which are connected between the drive terminals and load terminals. The fully differential level conversion circuit realizes applications in the signal processing process which has low power consumption and high-speed, and improves duty cycle of the output signal.