MULTI-LEVEL MEMORY CELLS AND METHODS FOR FORMING MULTI-LEVEL MEMORY CELLS

Integrated circuits with multi-level memory cells and methods for producing the same are provided. A method for producing an integrated circuit with a multi-level memory cell includes forming a gate insulator overlying a substrate. A select gate is formed overlying the gate insulator such that one multi-level memory cell includes one select gate. A thin film storage layer with nanocrystals is formed overlying the select gate and the substrate, and a left and right control gate are formed on opposite sides of the select gate such that the thin film storage layer is between the substrate and each of the control gates. A left implant and a right implant are formed in the substrate such that the select gate, the left control gate, and the right control gate are positioned between the left and right implants.