DUTY CYCLE ADJUSTMENT WITH ERROR RESILIENCY

DUTY CYCLE ADJUSTMENT WITH ERROR RESILIENCY

The present disclosure regards adjusting a duty cycle, which includes generating a duty cycle signal having a voltage representing a duty cycle of a clock signal; adjusting a reference voltage generated by an adjustable reference voltage generator to match the duty cycle signal to produce a first ma...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KOCH MICHAEL, ARP ANDREAS, CILEK FATIH, MENOLFI CHRISTIAN I, NISSLER DIETER, RINGE MATTHIAS, HUTZL GUENTHER
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:The present disclosure regards adjusting a duty cycle, which includes generating a duty cycle signal having a voltage representing a duty cycle of a clock signal; adjusting a reference voltage generated by an adjustable reference voltage generator to match the duty cycle signal to produce a first matched value; inverting voltage sources of the reference voltage generator; adjusting, while the voltage sources are inverted, the reference voltage to produce a second matched value; and calculating a duty cycle value based on the first and second matched values.