PLASMA PROCESSOR AND PLASMA PROCESSING METHOD

An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower...

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Bibliographische Detailangaben
Hauptverfasser: SHIMA SHINYA, KAYAMORI SATOSHI, SAKAMOTO YUICHIRO, KIKUCHI AKIHIRO, GONDAI TADASHI, UEDA TAKEHIRO, HIGUCHI KIMIHIRO, OOHASHI KAORU, SHIBUYA MUNEHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., −400 to −600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.