HARDWARE IMPLEMENTED ETHERNET MULTIPLE TUPLE FILTER SYSTEM AND METHOD

HARDWARE IMPLEMENTED ETHERNET MULTIPLE TUPLE FILTER SYSTEM AND METHOD

A filter in a DOCSIS bridge performs IP Filtering of incoming Ethernet packets in hardware. The filter includes a parser circuit which, in hardware, parses each of the incoming Ethernet packets and then utilizes the parsed information in combination with a content-addressable memory (CAM) that store...

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Bibliographische Detailangaben
Hauptverfasser: WHITLOW ANDREW, HANNA CHARAF, HAMMOND MAYNARD, NI ZHIFANG J, DARBY BENJAMIN, SHALLOW GALE
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:A filter in a DOCSIS bridge performs IP Filtering of incoming Ethernet packets in hardware. The filter includes a parser circuit which, in hardware, parses each of the incoming Ethernet packets and then utilizes the parsed information in combination with a content-addressable memory (CAM) that stores filtering information, to filter and route the incoming Ethernet packets. Detailed statistical data may also be generated to provide information on the type of filtering being performed by the DOCSIS bridge.