SEMICONDUCTOR WAFER, SEMICONDUCTOR IC CHIP AND MANUFACTURING METHOD OF THE SAME

A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration regions, respectively. A scribe region disposed between every adjacent two of the guard rings. An element and a pad electrically connected...

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Hauptverfasser: NAKAMURA HISAO, NAKAGOMI YUICHI, KUMAGAI YASUHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration regions, respectively. A scribe region disposed between every adjacent two of the guard rings. An element and a pad electrically connected to the element are disposed in the scribe region. A groove is disposed along a corresponding guard ring on a front surface of the semiconductor wafer between the pad and the corresponding guard ring. The distance between the groove and the pad is varied along the corresponding guard ring.