MULTIPLE LEVEL REDISTRIBUTION LAYER FOR MULTIPLE CHIP INTEGRATION

MULTIPLE LEVEL REDISTRIBUTION LAYER FOR MULTIPLE CHIP INTEGRATION

A package with multiple chips and a shared redistribution layer is described. In one example, a first and a second die are formed where the first and the second die each have a different height. The dies are placed on a substrate. The first, the second, or both dies are ground so that the first and...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: GOETZ EDMUND, MOLZER WOLFGANG, MEMMLER BERND, MAHNKOPF REINHARD
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A package with multiple chips and a shared redistribution layer is described. In one example, a first and a second die are formed where the first and the second die each have a different height. The dies are placed on a substrate. The first, the second, or both dies are ground so that the first and the second die are about the same height. Layers, such as redistribution layers are formed over both the first and the second die at the same time using a single process, and the first and the second die and the formed layers are packaged.