PSEUDO SELF ALIGNED RADHARD MOSFET AND PROCESS OF MANUFACTURE

PSEUDO SELF ALIGNED RADHARD MOSFET AND PROCESS OF MANUFACTURE

A Vertical Power MOSFET (VDMOS) device with special features that enable the Power MOSFET or IGBT device to withstand harsh radiation environments and the process of making such a device is described. All implanted and diffused layers are "self aligned" to a "Sacrificial Poly" la...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: VANDENBERG MARC H, SDRULLA DUMITRU, KARLSSON ERIC
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A Vertical Power MOSFET (VDMOS) device with special features that enable the Power MOSFET or IGBT device to withstand harsh radiation environments and the process of making such a device is described. All implanted and diffused layers are "self aligned" to a "Sacrificial Poly" layer, which later on is removed, preparing the wafers for a "late gate" oxide to be grown. A starting material with graded doping profile in the epitaxial layer on the substrate is shown to increase the SEB capability of the Power MOSFET.