DUAL ASYNCHRONOUS AND SYNCHRONOUS MEMORY SYSTEM

Embodiments relate to a dual asynchronous and synchronous memory system. One aspect is a system that includes a memory controller and a memory buffer chip coupled to the memory controller via a synchronous channel. The memory buffer chip includes a memory buffer unit configured to synchronously comm...

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Bibliographische Detailangaben
Hauptverfasser:	GILDA GLENN D, CURLEY LAWRENCE D, PAPAZOVA VESSELINA K, VAN HUBEN GARY A, RIDER SCOT H, BAYSAH IRVING G, DODSON JOHN S, MEANEY PATRICK J, GREGERSON JAMES C, RETTER ERIC E
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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Beschreibung
Zusammenfassung:	Embodiments relate to a dual asynchronous and synchronous memory system. One aspect is a system that includes a memory controller and a memory buffer chip coupled to the memory controller via a synchronous channel. The memory buffer chip includes a memory buffer unit configured to synchronously communicate with the memory controller in a nest domain, and a memory buffer adaptor configured to communicate with at least one memory interface port in a memory domain. The at least one memory interface port is operable to access at least one memory device. A boundary layer is connected to the nest domain and the memory domain, where the boundary layer is configurable to operate in a synchronous transfer mode between the nest and memory domains and to operate in an asynchronous transfer mode between the nest and memory domains.