Wafer, Integrated Circuit Chip and Method for Manufacturing an Integrated Circuit Chip

A wafer has a number of IC areas and a kerf area arranged between the IC areas. The kerf area has a dicing area, a crack stop structure arranged between an IC area and a dicing area, and a trench arranged between the crack stop structure and the dicing area. The crack stop structure includes an exte...

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Bibliographische Detailangaben
Hauptverfasser:	GRATZ ACHIM, SCHINDELAR THIMO
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	A wafer has a number of IC areas and a kerf area arranged between the IC areas. The kerf area has a dicing area, a crack stop structure arranged between an IC area and a dicing area, and a trench arranged between the crack stop structure and the dicing area. The crack stop structure includes an extended layer extending beyond the crack stop structure towards the dicing area.