METHOD AND SYSTEM FOR DESIGNING 3D SEMICONDUCTOR PACKAGE

A three-dimensional semiconductor package and method for making the same include providing a first package layout parameter for a plurality of first terminals included in a first package, a second package layout parameter for a plurality of second terminals included in a second package disposed abov...

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Bibliographische Detailangaben
Hauptverfasser: HWANG BO-SUN, YUN SUNG-HEE, LEE TAE-HEON, CHEON YOUNG-HOE, LEE WONOL, JEONG JAE-HOON
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A three-dimensional semiconductor package and method for making the same include providing a first package layout parameter for a plurality of first terminals included in a first package, a second package layout parameter for a plurality of second terminals included in a second package disposed above or below the first package, and a connection terminal layout parameter for a plurality of connection terminals electrically connecting the first package and the second package; providing a first wiring connection layout between the first and second terminals and the connection terminals by applying a first process to the first package, second package, and connection terminal layout parameters; and providing a second wiring connection layout between the first and second terminals and the connection terminals by applying a second process, which is different from the first process, to the first wiring connection layout.