SYSTEM AND METHOD FOR REDUCED CACHE MODE

A system and method are described for dynamically changing the size of a computer memory such as level 2 cache as used in a graphics processing unit. In an embodiment, a relatively large cache memory can be implemented in a computing system so as to meet the needs of memory intensive applications. B...

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Bibliographische Detailangaben
Hauptverfasser: ROBERTSON JAMES PATRICK, MUTHLER GREGORY ALAN, LEW STEPHEN D, SIMERAL BRAD W, BITTEL DON, WOODMANSEE MICHAEL A, BURGESS JOHN MATTHEW, RUBINSTEIN OREN, RIEGELSBERGER EDWARD
Format: Patent
Sprache:eng
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Zusammenfassung:A system and method are described for dynamically changing the size of a computer memory such as level 2 cache as used in a graphics processing unit. In an embodiment, a relatively large cache memory can be implemented in a computing system so as to meet the needs of memory intensive applications. But where cache utilization is reduced, the capacity of the cache can be reduced. In this way, power consumption is reduced by powering down a portion of the cache.