METHOD OF MANUFACTURING VERTICAL PIN DIODES

Disclosed is a vertical PIN diode having: an N-type layer; a cathode contact formed on a first portion of the N-type layer defining a cathode region; an intrinsic layer formed on a second portion of the N-type layer; a portion of a P-type layer formed on a first portion of the intrinsic layer and de...

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Bibliographische Detailangaben
Hauptverfasser:	PERONI MARCO, PANTELLINI ALESSIO
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	Disclosed is a vertical PIN diode having: an N-type layer; a cathode contact formed on a first portion of the N-type layer defining a cathode region; an intrinsic layer formed on a second portion of the N-type layer; a portion of a P-type layer formed on a first portion of the intrinsic layer and defining an anode region; an anode contact formed on the portion of the P-type layer defining the anode region; and a protection structure formed on a second portion of the intrinsic layer to laterally protect the portion of the P-type layer defining the anode region from an etching intended to expose the first portion of the N-type layer defining the cathode region, wherein the protection structure is formed by implanting ions in a further portion of the P-type layer, which laterally surrounds the portion of the P-type layer defining the anode region.