INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER
Disclosed herein is a device that includes first and second spaced-apart conductive pads positioned in a layer of insulating material, first and second under-bump metallization layers that are conductively coupled to the first and second conductive pads, respectively, and first and second spaced-apa...
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| creator | KOSGALWIES SVEN JUNGNICKEL GOTTHARD LEHMANN LOTHAR PLATZ ALEXANDER KUECHENMEISTER FRANK |
| description | Disclosed herein is a device that includes first and second spaced-apart conductive pads positioned in a layer of insulating material, first and second under-bump metallization layers that are conductively coupled to the first and second conductive pads, respectively, and first and second spaced-apart conductive bumps that are conductively coupled to the first and second under-bump metallization layers, respectively. Additionally, the device includes, among other things, a passivation layer positioned above the layer of insulating material between the first and second spaced-apart conductive bumps, and a protective layer positioned on the passivation layer, wherein the protective layer extends between and contacts the first and second under-bump metallization layers, the material of the protective layer being one of silicon dioxide, silicon oxyfluoride (SiOF), silicon nitride (SiN), and silicone carbon nitride (SiCN). |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2014021604A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2014021604A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2014021604A13</originalsourceid><addsrcrecordid>eNqNyrEKwjAQgOEsDqK-w4GzkNTiHi-nOahJSS-KUykSJ9FCfX908AGcfvj45ypyEDomK-QAOWFmAUdnRurgwuJhn08tdJIySk5fFG8FOGCTHYGFNkUhFI4BGnultFSz-_CYyurXhVofSNBvyvjqyzQOt_Is7z53lTa1rsxO19Zs_7s-IAAv3Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER</title><source>esp@cenet</source><creator>KOSGALWIES SVEN ; JUNGNICKEL GOTTHARD ; LEHMANN LOTHAR ; PLATZ ALEXANDER ; KUECHENMEISTER FRANK</creator><creatorcontrib>KOSGALWIES SVEN ; JUNGNICKEL GOTTHARD ; LEHMANN LOTHAR ; PLATZ ALEXANDER ; KUECHENMEISTER FRANK</creatorcontrib><description>Disclosed herein is a device that includes first and second spaced-apart conductive pads positioned in a layer of insulating material, first and second under-bump metallization layers that are conductively coupled to the first and second conductive pads, respectively, and first and second spaced-apart conductive bumps that are conductively coupled to the first and second under-bump metallization layers, respectively. Additionally, the device includes, among other things, a passivation layer positioned above the layer of insulating material between the first and second spaced-apart conductive bumps, and a protective layer positioned on the passivation layer, wherein the protective layer extends between and contacts the first and second under-bump metallization layers, the material of the protective layer being one of silicon dioxide, silicon oxyfluoride (SiOF), silicon nitride (SiN), and silicone carbon nitride (SiCN).</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140123&DB=EPODOC&CC=US&NR=2014021604A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140123&DB=EPODOC&CC=US&NR=2014021604A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KOSGALWIES SVEN</creatorcontrib><creatorcontrib>JUNGNICKEL GOTTHARD</creatorcontrib><creatorcontrib>LEHMANN LOTHAR</creatorcontrib><creatorcontrib>PLATZ ALEXANDER</creatorcontrib><creatorcontrib>KUECHENMEISTER FRANK</creatorcontrib><title>INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER</title><description>Disclosed herein is a device that includes first and second spaced-apart conductive pads positioned in a layer of insulating material, first and second under-bump metallization layers that are conductively coupled to the first and second conductive pads, respectively, and first and second spaced-apart conductive bumps that are conductively coupled to the first and second under-bump metallization layers, respectively. Additionally, the device includes, among other things, a passivation layer positioned above the layer of insulating material between the first and second spaced-apart conductive bumps, and a protective layer positioned on the passivation layer, wherein the protective layer extends between and contacts the first and second under-bump metallization layers, the material of the protective layer being one of silicon dioxide, silicon oxyfluoride (SiOF), silicon nitride (SiN), and silicone carbon nitride (SiCN).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQgOEsDqK-w4GzkNTiHi-nOahJSS-KUykSJ9FCfX908AGcfvj45ypyEDomK-QAOWFmAUdnRurgwuJhn08tdJIySk5fFG8FOGCTHYGFNkUhFI4BGnultFSz-_CYyurXhVofSNBvyvjqyzQOt_Is7z53lTa1rsxO19Zs_7s-IAAv3Q</recordid><startdate>20140123</startdate><enddate>20140123</enddate><creator>KOSGALWIES SVEN</creator><creator>JUNGNICKEL GOTTHARD</creator><creator>LEHMANN LOTHAR</creator><creator>PLATZ ALEXANDER</creator><creator>KUECHENMEISTER FRANK</creator><scope>EVB</scope></search><sort><creationdate>20140123</creationdate><title>INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER</title><author>KOSGALWIES SVEN ; JUNGNICKEL GOTTHARD ; LEHMANN LOTHAR ; PLATZ ALEXANDER ; KUECHENMEISTER FRANK</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2014021604A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KOSGALWIES SVEN</creatorcontrib><creatorcontrib>JUNGNICKEL GOTTHARD</creatorcontrib><creatorcontrib>LEHMANN LOTHAR</creatorcontrib><creatorcontrib>PLATZ ALEXANDER</creatorcontrib><creatorcontrib>KUECHENMEISTER FRANK</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KOSGALWIES SVEN</au><au>JUNGNICKEL GOTTHARD</au><au>LEHMANN LOTHAR</au><au>PLATZ ALEXANDER</au><au>KUECHENMEISTER FRANK</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER</title><date>2014-01-23</date><risdate>2014</risdate><abstract>Disclosed herein is a device that includes first and second spaced-apart conductive pads positioned in a layer of insulating material, first and second under-bump metallization layers that are conductively coupled to the first and second conductive pads, respectively, and first and second spaced-apart conductive bumps that are conductively coupled to the first and second under-bump metallization layers, respectively. Additionally, the device includes, among other things, a passivation layer positioned above the layer of insulating material between the first and second spaced-apart conductive bumps, and a protective layer positioned on the passivation layer, wherein the protective layer extends between and contacts the first and second under-bump metallization layers, the material of the protective layer being one of silicon dioxide, silicon oxyfluoride (SiOF), silicon nitride (SiN), and silicone carbon nitride (SiCN).</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER |
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