WORD LINE DRIVER CIRCUITS AND METHODS FOR SRAM BIT CELL WITH REDUCED BIT LINE PRE-CHARGE VOLTAGE

A memory device comprising a plurality of static random access memory (SRAM) bit cells, and a word line driver coupled to provide a word line signal to the bit cells. The word line driver receives a global word line signal that remains active while the word line signal is asserted and subsequently d...

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Bibliographische Detailangaben
Hauptverfasser: BURNETT JAMES D, PELLEY PERRY H
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A memory device comprising a plurality of static random access memory (SRAM) bit cells, and a word line driver coupled to provide a word line signal to the bit cells. The word line driver receives a global word line signal that remains active while the word line signal is asserted and subsequently de-asserted, and the word line signal is coupled between a positive supply voltage (VDD) and a supply voltage below ground (VN).