ROW DRIVER ARCHITECTURE

Devices and circuits for row driver in a memory device. The proposed row driver circuit architectures may reduce size of the row driver circuitry and enhance the row driver circuit's reliability. Specifically, the proposed embodiments of the row driver may reduce the required sizing of the boosting capacitor or alternatively eliminate the boosting capacitor entirely. Further, the embodiments of the row driver may reduce the risk of charge-leakage on K-nodes, enhancing the row driver's reliability in driving the x-path of the memory array.