IMPEDANCE OPTIMIZED CHIP SYSTEM

A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	ROOZEBOOM DOMINICUS MARINUS, NUNN WAYNE A, SPEHAR JAMES RAYMOND, PAQUET CHRISTIAN, SCHULZE JOSEPH, KHALSA FATHA
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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