METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION OF A PROCESSOR

A method for controlling the clock frequency of a processor while suppressing performance degradation is disclosed. The processor receives power from a battery to operate at a high clock frequency HFM(f) or a low clock frequency LFM(f). An allowable current Im is set for the discharge current of the...

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Bibliographische Detailangaben
Hauptverfasser:	NAGATA NOZOMU, ODAOHHARA SHIGEFUMI
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS PHYSICS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
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Beschreibung
Zusammenfassung:	A method for controlling the clock frequency of a processor while suppressing performance degradation is disclosed. The processor receives power from a battery to operate at a high clock frequency HFM(f) or a low clock frequency LFM(f). An allowable current Im is set for the discharge current of the battery. The time during which the processor operates at the HFM(f) and the time during which the processor operates at the LFM(f) are controlled by PWM. As the feedback current Ifb increases, the time during which the processor operates at the LFM(f) become longer than the time during which the processor operates at the HFM(f).