STRUCTURE AND MANUFACTURING METHOD FOR REDUCING STRESS OF CHIP

STRUCTURE AND MANUFACTURING METHOD FOR REDUCING STRESS OF CHIP

The invention provides a structure and a manufacturing method thereof for reducing a stress of a chip. The structure comprises a through-silicon via (TSV), a plurality of reinforcing base and a plurality of base bodies. The reinforcing bases are disposed near and around the TSV. The base bodies are...

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Hauptverfasser: YU HAO, CHANG SHIHIEN, CHIEN JUI-HUNG, TSAI NIEN-YU
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator YU HAO
CHANG SHIHIEN
CHIEN JUI-HUNG
TSAI NIEN-YU
description The invention provides a structure and a manufacturing method thereof for reducing a stress of a chip. The structure comprises a through-silicon via (TSV), a plurality of reinforcing base and a plurality of base bodies. The reinforcing bases are disposed near and around the TSV. The base bodies are disposed near and around the TSV, and the base is disposed on a side of the reinforcing base. The reinforcing base or the base body does not connected with the TSV.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title STRUCTURE AND MANUFACTURING METHOD FOR REDUCING STRESS OF CHIP
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