METHODS OF FORMING STEPPED ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES USING A SPACER TECHNIQUE

Disclosed herein are various methods of forming stepped isolation structures for semiconductor devices using a spacer technique. In one example, the method includes forming a first trench in a semiconducting substrate, wherein the first trench has a bottom surface, a width and a depth, the depth of the first trench being less than a target final depth for a stepped trench isolation structure, performing an etching process through the first trench on an exposed portion of the bottom surface of the first trench to form a second trench in the substrate, wherein the second trench has a width and a depth, and wherein the width of the second trench is less than the width of the first trench, and forming the stepped isolation structure in the first and second trenches.