MEMORY MANAGEMENT DEVICE AND MEMORY MANAGEMENT METHOD

In an embodiment, a device includes a first unit, a second unit, and a third unit. The first unit generates a write address representing a write position to sequentially store sequential data from a processor to a nonvolatile main memory. The second unit generates order information representing a de...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	OWA TSUTOMU, OMIZO TAKASHI, SAKAMOTO HIROYUKI, MIYAGAWA MASAKI, NAKAI HIROTO, KUNIMATSU ATSUSHI, NISHINO REINA
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	In an embodiment, a device includes a first unit, a second unit, and a third unit. The first unit generates a write address representing a write position to sequentially store sequential data from a processor to a nonvolatile main memory. The second unit generates order information representing a degree of newness of write. The third unit writes sequentially writes the sequential data at the write address with the order information.