Content-Addressable Memory Architecture for Routing Raw Hit Lines Using Minimal Base Metal Layers

A CAM circuit includes a plurality of core memory cells, each cell including comparison logic for generating a local match signal based on a comparison between stored data in the cell and a compare value. The CAM circuit includes a plurality of local match lines, each local match line coupled with a...

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Bibliographische Detailangaben

Hauptverfasser:	RACHAMADUGU VINOD, ROY UDDIP, RAO SETTI SHANMUHKHESWARA
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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