PROCESSOR CONFIGURED TO PERFORM TRANSACTIONAL MEMORY OPERATIONS

PROCESSOR CONFIGURED TO PERFORM TRANSACTIONAL MEMORY OPERATIONS

In a particular embodiment, a very long instruction word (VLIW) processor is operable to execute VLIW instructions. At least one of the VLIW instructions includes a first load or store instruction and a second load or store instruction. The first instruction and the second instruction are executed a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: INGLE AJAY A, CODRESCU LUCIAN, PLONDKE ERICH J
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:In a particular embodiment, a very long instruction word (VLIW) processor is operable to execute VLIW instructions. At least one of the VLIW instructions includes a first load or store instruction and a second load or store instruction. The first instruction and the second instruction are executed as a single atomic unit. At least one of the first and second instructions is a store-conditional instruction.