Programmable Scannable Storage Circuit

A scannable storage circuit includes a scan enable input, a storage element having a Node coupled to a data output buffer for driving a data output terminal. The data output buffer includes an inverter; a transmission gate having a first MOS transistor and a second MOS transistor with sources and dr...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PARIKH NAISHAD NARENDRA, SABBARWAL PUNEET, BHAT ANAND, TIWARI PRANJAL, DUBEY AISHWARYA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A scannable storage circuit includes a scan enable input, a storage element having a Node coupled to a data output buffer for driving a data output terminal. The data output buffer includes an inverter; a transmission gate having a first MOS transistor and a second MOS transistor with sources and drains coupled to each other, drains coupled to an output of the inverter and sources coupled to the data output terminal and gates coupled to the scan enable input and an inverted scan enable input. A third MOS transistor and a fourth MOS transistor is coupled to the sources of the first and second MOS transistors, the third MOS transistor and fourth MOS transistor are configured to pull up or pull down the data output terminal in response to a first control signal and a second control signal respectively. A scan output is generated from the output of the inverter.