SEMICONDUCTOR DEVICE PACKAGING METHOD AND SEMICONDUCTOR DEVICE PACKAGE
Disclosed is a discrete semiconductor device package (100) comprising a leadframe portion (10) comprising a recess (14) having a depth substantially equal to the thickness of the discrete semiconductor device (20), wherein a raised portion of the leadframe portion adjacent to said recess defines a f...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | Disclosed is a discrete semiconductor device package (100) comprising a leadframe portion (10) comprising a recess (14) having a depth substantially equal to the thickness of the discrete semiconductor device (20), wherein a raised portion of the leadframe portion adjacent to said recess defines a first contact area (12); a discrete semiconductor device (20) in said recess, wherein the exposed surface (22) of the discrete semiconductor device defines a second contact area; a protective layer (30) covering the leadframe portion and the a discrete semiconductor device but not the first contact area and the second contact area; and respective plating layers (40) covering the first contact area and the second contact area. A method of manufacturing such a package and a carrier comprising such a package are also disclosed. |
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